MUMBAI, India, Nov. 2 -- Intellectual Property India has published a patent application (202541040487 A) filed by Samsung Electronics Co. , Ltd. on April 26, 2025, for Write Assist Circuit For Generating Bitcell Power Supply Voltage In A Static Random Access Memory.
Inventors include Gogineni, Gopi Sunanth Kumar; Agarwal, Sarvesh; Pulluru, Lava Kumar; and Joshi, Manish Chandra.
The application for the patent was published on October 30, 2026, under issue no. 44/2026.
Abstract: A write assist circuit for generating a bitcell power supply voltage in a static random access memory. The write assist circuit performs a pull-down operation on the bitcell power supply voltage. The write assist circuit includes a pull-up circuit controlled by a core power enable signal and a write assist enable signal and prevents a short supply path between a core power supply voltage and a ground. The write assist circuit includes a pass gate coupled to the pull-up circuit and controlled by a logical low voltage or a logical high voltage, and provides a pull-down path for the bitcell power supply voltage. The write assist circuit includes a pull-down circuit, to pull down the bitcell power supply voltage, including an n-type metal-oxide-semiconductor (NMOS) pull-down transistor, a p-type metal-oxide-semiconductor (PMOS) pull-down transistor coupled in parallel with the pull-down transistor, and a footer coupled between the pull-down transistor and the ground.
Disclaimer: Curated by HT Syndication.
