MUMBAI, India, Sept. 7 -- Intellectual Property India has published a patent application (202617083362 A) filed by Ce Cell Engineering Gmbh on July 07, 2026, for Wafer-Based Solar Cell, And Method For Manufacturing Such A Wafer-Based Solar Cell.
Inventor includes Krassowski, Eve.
The application for the patent was published on September 04, 2026, under issue no. 36/2026.
Abstract: The invention relates to a wafer-based solar cell comprising a semiconductor wafer that is made of a semiconductor material consisting of silicon and that has a semiconductor wafer surface, at least one p-doped region, and at least one n-doped region, wherein the p-doped region and/or the n-doped region is electrically contacted, via opening regions and current contact regions located therein, with a metal electrode structure attached to the semiconductor wafer surface, and the metal electrode structure covers an electrode cover area on the semiconductor wafer surface, and wherein the semiconductor wafer surface of the wafer-based solar cell has a passivation layer arranged between the semiconductor material and the metal electrode structure, and wherein this passivation layer consists at least in part of an aluminium oxide and/or the metal electrode structure is formed from a metallic material containing, at least in part, aluminium, and wherein the current contact regions pass through the passivation layer and wherein, at the current contact regions, a metal-silicon mixture is formed in a first mixing region in the transition region between the metal electrode structure, the passivation layer, and the semiconductor material. The aim of the invention is to provide a wafer-based solar cell, wherein the wafer- based solar cell has a reduced electrical contact resistance in order to increase the efficiency of the wafer-based solar cell. This aim is achieved by forming, in the current contact regions (5), a second mixing region in the semiconductor material at an end of the first mixing region (9) facing the semiconductor material, and embedding aluminium atoms in the semiconductor material within this second mixing region (10).
Disclaimer: Curated by HT Syndication.
