MUMBAI, India, June 22 -- Intellectual Property India has published a patent application (202641068850 A) filed by Indian Institute Of Science on June 01, 2026, for Voltage Offset Reduction In 2d Material Based Hall Sensors.
Inventors include Doddi, Koteswar; and Polley, Arup.
The application for the patent was published on June 12, 2026, under issue no. 24/2026.
Abstract: ABSTRACT VOLTAGE OFFSET REDUCTION IN 2D MATERIAL BASED HALL SENSORS Techniques for voltage offset reduction in a 2D 5 material-based Hall sensor are described. In an example, a bias current is sequentially routed through a plurality of spinning states of the Hall sensor exposed to a magnetic field, where each spinning state corresponds to a distinct configuration of a plurality of contact terminals of the Hall sensor. The plurality of contact 10 terminals comprises current injection terminals and Hall voltage sensing terminals. For each spinning state, a plurality of gate voltages is applied to electrostatically modulate carrier concentration in a channel of the Hall sensor. Each of the plurality of gate voltages is selected to operate the Hall sensor in a hole conduction regime to obtain a first plurality of output 15 voltages and in an electron conduction regime to obtain a second plurality of output voltages. An overall voltage corresponding to the magnetic field with reduced offset voltage is obtained by combining the first plurality of output voltages and the second plurality of output voltages. 20 Fig. 1 34
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