MUMBAI, India, July 13 -- Intellectual Property India has published a patent application (202648081700 A) filed by Onnivation LLC on July 02, 2026, for Virtual Memory Paging System And Translation Lookaside Buffer With Pagelets.
Inventor includes Sitaram Yadavalli.
The application for the patent was published on July 10, 2026, under issue no. 28/2026.
Abstract: A page in a memory is sectioned into a plurality of pagelets (sub-pages) of sizes smaller than the page to speed up data transfers. The pagelets in the page are used to store, transport and process data, wherein individual pagelets are transferred between a memory and secondary storage in the system with smaller individual latencies than that of the page they comprise. Pagelets may be transferred in any order such that there is a reduction in the effective latency of the transfer of critical chunks of data as seen by an agent to increase overall performance. Pagelets of a page share one entry in a page table that also includes a virtual to physical translation. A pagelet translation lookaside buffer that handles pages having pagelets is used to cache frequently used translations and a critical pagelet determiner is used to indicate the critical pagelet involved in a transaction.
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