MUMBAI, India, July 7 -- Intellectual Property India has published a patent application (202511110864 A) filed by National Institute Of Technology, Delhi; and Dhandapani Vaithiyanathan on November 13, 2025, for System And Method For Power-Efficient Image Processing Using Hardware- Optimized Computation.
Inventors include Anuraj V; and Dhandapani Vaithiyanathan.
The application for the patent was published on July 03, 2026, under issue no. 27/2026.
Abstract: A power-efficient image processing system (100) and method (400) are disclosed. The system (100) comprises an input interface (102), a control module (104), a hardware-optimized computation unit (106), and an output reconstruction unit (116). The computation unit (106) includes a bit-partitioning circuit (108) for separating image data into higher-significance and lower- significance bits, a high-significance computation circuit (110) for full-precision processing, a low-significance approximation circuit (112) for reduced-complexity processing, and a bit-level gating circuit (114) for suppressing switching activity in lower-significance data paths. The output reconstruction unit (116) combines processed data to generate an output image. The method (400) includes receiving image data, segregating bits based on significance, performing full-precision and reduced-complexity computations, selectively suppressing signal transitions, and recombining outputs. The system reduces switching activity, logic utilization, and propagation delay while maintaining perceptual image quality.
Disclaimer: Curated by HT Syndication.
