MUMBAI, India, Oct. 5 -- Intellectual Property India has published a patent application (202641115781 A) filed by Indian Institute Of Science on September 28, 2026, for System And Method For Mitigating Transient Current Imbalance In Parallelly Connected Gan Hemts.
Inventors include Manish Mandal; Harish S; and Kaushik Basu.
The application for the patent was published on October 02, 2026, under issue no. 40/2026.
Abstract: SYSTEM AND METHOD FOR MITIGATING TRANSIENT CURRENT IMBALANCE IN PARALLELLY CONNECTED GAN HEMTs The present disclosure relates to a system and method for mitigating transient current imbalance in parallelly connected gallium nitride (GaN) high electron mobility transistor (HEMTs), comprising receiving, a plurality of pulse width modulated (PWM) signal, by a plurality of GaN HEMTs connected in parallel, wherein the plurality of GaN HEMTs are driven by respective gate-drive paths, determining a delay offset for at least one gate-drive path based on a switching characteristic of the GaN HEMTs and applying the delay offset, by a delay card, to align effective switching instants of the plurality of parallelly connected GaN HEMTs for mitigating transient current imbalance. [FIG. 1]
Disclaimer: Curated by HT Syndication.
