MUMBAI, India, Sept. 14 -- Intellectual Property India has published a patent application (202641108038 A) filed by Kgr Foundation For Business Incubation on September 08, 2026, for System And Method For Integrating A Custom Pcpi-Compatible Multiply-Accumulate Coprocessor With A Risc-V Soft Core Processor.
Inventors include Dr Beemanpally Vandana; Patan Muzafur; and Dr Manthena Nadpi Narsaiah.
The application for the patent was published on September 11, 2026, under issue no. 37/2026.
Abstract: System and Method for Integrating a Custom PCPI-Compatible Multiply-Accumulate Coprocessor with a RISC-V Soft Core Processor A custom Multiply-Accumulate (MAC) coprocessor integrated with a lightweight PicoRV32 RISC-V soft core via the Pico Co-Processor Interface (PCPI). Overcoming the limitations of intrusive core modifications, the architecture routes a non-destructive custom opcode entirely through the PCPI bus, bypassing the primary ALU. This enables a single-dispatch operand transfer that significantly reduces cycle counts without requiring vector register bloat. The system establishes explicit hardware isolation using standard handshaking signals, allowing multi-cycle asynchronous computation while safely halting the main core. The native RV32I critical path and timing remain completely unaltered. End-to-end verification using GCC-compiled binaries confirms zero regressions across the base instruction set, delivering efficient, general-purpose scalar acceleration for lightweight processors.
Disclaimer: Curated by HT Syndication.
