MUMBAI, India, July 30 -- Intellectual Property India has published a patent application (202621066946 A) filed by Pimpri Chinchwad College Of Engineering, Pune; Ms. Harshada Rangnath Mhaske; Nakul Sanjeev Arora; Abhishek Mangesh Chavan; Shivam Vijaykumar Chavan; and Bhavesh Mahadev Chintakindi on May 28, 2026, for System And Method For Hardware-Aware Code Synthesis And Execution In Embedded Devices.
Inventors include Ms. Harshada Rangnath Mhaske; Nakul Sanjeev Arora; Abhishek Mangesh Chavan; Shivam Vijaykumar Chavan; and Bhavesh Mahadev Chintakindi.
The application for the patent was published on July 24, 2026, under issue no. 30/2026.
Abstract: ABSTRACT SYSTEM AND METHOD FOR HARDWARE-AWARE CODE SYNTHESIS AND EXECUTION IN EMBEDDED DEVICES The present disclosure relates to a system and method for hardware-aware code synthesis and execution in embedded devices. The system (100) comprises a processing unit (102) configured to execute a hardware detection module (104) for identifying a connected embedded device using one or more detection mechanisms including USB-based identification, command-line interrogation, and operating system enumeration. A knowledge retrieval module (106) stores and retrieves hardware-specific data based on the identified device. A code synthesis engine (108) generates device-specific code, and an execution controller (110) compiles and deploys the code onto the device, and upon failure, performs iterative re-execution by modifying at least one of compilation parameters, code configuration, or a communication interface (112) based on execution feedback. The communication interface (112) enables interaction via serial or network communication, wherein the system forms a closed-loop execution pipeline. FIG. 1 will be the reference figure.
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