MUMBAI, India, Aug. 31 -- Intellectual Property India has published a patent application (202541015692 A) filed by Bharat Electronics Limited on February 21, 2025, for System And Method For Efficient Bandwidth Utilization In Time-Critical Ptmp Networks Using Ip Packet Fragmentation And Reassembly.
Inventors include Pulla Rao Chilakala; Desanna Morumpalli; and Sampathkumar P.
The application for the patent was published on August 28, 2026, under issue no. 35/2026.
Abstract: ABSTRACT SYSTEM AND METHOD FOR EFFICIENT BANDWIDTH UTILIZATION IN TIME- CRITICAL PTMP NETWORKS USING IP PACKET FRAGMENTATION AND REASSEMBLY The present invention provides system and method for optimizing bandwidth utilization in Point-to-Multipoint (PTMP) wireless communication networks by seamlessly integrating adaptive IP packet fragmentation and reassembly techniques with real-time Time Division Multiple Access (TDMA) and Time Division Duplex (TDD) protocols. The system employs a dual-processor architecture comprising an ARM processor for managing real-time operating system (RTOS) tasks and a C64x+ DSP for high-speed data processing, ensuring low latency and high throughput. Further, a dynamic kernel-level algorithm that monitors network conditions in real-time, enabling intelligent fragmentation and reassembly of IP packets to reduce latency, minimize packet loss, and enhance data integrity. A custom frame structure embeds metadata, synchronization bytes, and optional Forward Error Correction (FEC) codes,
Disclaimer: Curated by HT Syndication.
