MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202611069649 A) filed by Linearized Amplifier Technologies And Services Private Limited; and Indian Institute Of Technology Roorkee on June 03, 2026, for System And Method For Designing Fully Integrated On-Chip Waveform-Engineered Power Amplifier.
Inventors include Rawat, Karun; Singh, Kamini; Pal, Aditya; and Sharma, Vivek.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: The present disclosure pertains to a fully integrated on-chip power amplifier system (600) and a method (900) for waveform-engineered operation of the power amplifier system (600). The fully integrated on-chip power amplifier system (600) includes an input module (602) to receive a signal, amplifier stages and an interstage matching network (610) disposed between successive amplifier stages to compensate parasitic loading between the successive amplifier stages. The fully integrated on- chip power amplifier system (600) includes an output matching network (502) to establish predetermined harmonic impedance conditions for waveform-engineered operation of the signal at an output of a power amplification stage (608). The fully integrated on-chip power amplifier system (600) includes a parasitic neutralization network (302) to determine equivalent parasitic loading at an intrinsic current generation plane of transistors during processing of the signal and synthesize a compensating impedance or a compensating admittance to compensate perturbation of the predetermined harmonic impedance conditions caused by the equivalent parasitic loading.
Disclaimer: Curated by HT Syndication.
