MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202647106273 A) filed by Tenstorrent Usa, Inc. on September 03, 2026, for Static Trusted Execution Environment For Inter-Architecture Processor Program Compatibility.
Inventors include Chen, Zhimin; Dockser, Kenneth; Ishii, Yasuo; and Ousherovitch, Alex.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: Computer-implemented methods and associated hardware for static trusted execution environment for inter-architecture processor program compatibility are disclosed herein. A device (e.g., RISC-V), may emulate a static trusted execution environment (e.g., ARM TrustZone) using physical memory protection (PMP). A regular world may have access to only a portion of an address space of the device, while a secure world may have access to the full address space. A secure world identifier (SWID) may be a configuration status register (CSR) only accessible by a mode (e.g., machine mode). When an entry is added to a translation lookaside buffer (TLB), the SWID may be added as part of a tag to differentiate secure world entries from regular world entries.
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