MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202611096031 A) filed by Indian Institute Of Technology, Jammu on August 08, 2026, for Side-Channel Power Analysis Attack Resilient Static Random Access Memory (sram) Cell.
Inventors include Mushtaq, Umayia; Kour, Sandeep; and Shah, Ambika Prasad.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: The present disclosure discloses a memory cell (100) for semiconductor device to enable resilience against leakage power analysis (LPA) and write power analysis (WPA) attacks. Static Random Access Memory (SRAM) cell includes a set of inverter elements (102, 104) forming bistable storage latch that stores complementary logic states at first internal node (106) and second internal node (108). A set of leakage balance transistors (110, 112) balances leakage power distributions corresponding to complementary logic states stored in bistable storage latch. A read path (118) having read transistor elements (120, 122) isolates the bistable storage latch from differential read bit-lines (124, 126) during read operation. A write path (128) having write access elements (130, 132) operates through isolated control lines (134, 136). An equalization element (138) reduces voltage difference between the internal nodes during equalization phase of write operation, and control arrangement (140) sequentially initiates equalization and write phases.
Disclaimer: Curated by HT Syndication.
