MUMBAI, India, Aug. 12 -- Intellectual Property India has published a patent application (202621076382 A) filed by D. Y. Patil International University on June 19, 2026, for Semiconductor-Managed Adaptive Transient Buffering System.
Inventors include Dr. Vandana B. Patil; Mr. Krishna Ashok Gawande; Dr. Keval C Nikam; Dr. Priya Charls; and Dr. Sunil Dambhare.
The application for the patent was published on August 07, 2026, under issue no. 32/2026.
Abstract: The present disclosure relates to a semiconductor-managed adaptive transient buffering system (100) for power conditioning. The system comprises a power conditioning stage (102) supplying regulated DC power to a DC bus (106), a bidirectional DC-DC buck-boost converter (108) having semiconductor switching devices (112) and an energy transfer inductor (114), an energy buffer (110) with MXene-based supercapacitor cells arranged in a series-parallel configuration, a sensing unit (116) for real-time voltage, current, and temperature monitoring, and a digital control unit (118) implemented on a microcontroller (120). Upon detecting a transient load condition, the digital control unit (118) drives the converter (108) in boost mode through an isolated gate driver circuit (122), enabling the energy buffer (110) to provide supplementary current to the DC bus (106), thereby sharing load current with the input power source (104) and reducing peak current stress on the semiconductor switching devices (112). FIG. 1.
Disclaimer: Curated by HT Syndication.
