MUMBAI, India, Oct. 5 -- Intellectual Property India has published a patent application (202631095286 A) filed by National Institute Of Technology Rourkela Nit Rourkela on August 06, 2026, for Rail-To-Rail Dynamic Comparator Circuit And Method Employing Dual Slope Current Linearization.
Inventors include Baig, Mirza Amanullah; and Sarkar, Santanu.
The application for the patent was published on October 02, 2026, under issue no. 40/2026.
Abstract: The present invention relates to a rail-to-rail dynamic comparator circuit (300) and a method (400) employing Dual Slope Current Linearization (DSCL) for extending an input common-mode voltage range. The comparator circuit (300) comprises a preamplifier stage (302), a first current mirror input network (304), a second current mirror input network (306), a regeneration stage (308), and a latch stage (310). The first current mirror input network (304) and second current mirror input network (306) generate respective resultant bias currents by combining a constant bias current, proportional current component, and complementary current component for biasing the differential transistor pair. The method (400) comprises receiving first and second input signals, generating first and second resultant bias currents, biasing the differential transistor pair, regenerating differential signals, and generating complementary digital output signals. The present invention is applicable to dynamic comparators for analog-to-digital converters, sensor interface circuits, and high-speed low-power electronic applications. Fig.3
Disclaimer: Curated by HT Syndication.
