MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202647106372 A) filed by Tenstorrent Usa, Inc. on September 03, 2026, for Processor With Opportunistic Bypass Of Dispatch Buffer And Reservation Station.
Inventors include Jagota, Divyansh; Salvi, Manan R; Kothinti, Vignyan; and Lien, Wei-Han.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: Systems and methods related to a processor with opportunistic bypass of dispatch buffer and reservation station are disclosed herein. The microarchitecture of the processor can determine when conditions exist for the dispatch buffers, reservation station, or other components of an instruction pipeline, to be bypassed by an instruction. One or more components may be bypassed after at least a portion of the instruction pipeline is flushed or ignored. Instructions may bypass one or more components if the source operands of the instruction are ready, there is sufficient space at the destination bypass path, and if the bypassed component is empty. Systems and methods as disclosed herein may improve the efficiency of processing instructions and reduce penalties for branch interpretations and other errors.
Disclaimer: Curated by HT Syndication.
