MUMBAI, India, Sept. 14 -- Intellectual Property India has published a patent application (202611087054 A) filed by Noida Institute Of Engineering And Technology Niet on July 16, 2026, for Pipelined Receiver Architecture With Adaptive Iterative Decoding For Delay-Doppler Communication Systems.
Inventors include Pradumn Kumar Gupta; and Bhawna Khullar.
The application for the patent was published on September 11, 2026, under issue no. 37/2026.
Abstract: A pipelined receiver system (100) for delay-Doppler division multiplexing communication systems over doubly selective channels is disclosed. The system (100) comprises a radio frequency front-end module (110), an analog-to-digital conversion unit (120), a frame synchronization module (130), and a delay-Doppler domain transform engine (140). A multi-stage pipeline controller (150) orchestrates concurrent three-stage operation of a channel estimation pipeline stage (160), an interference mitigation and equalization pipeline stage (170), and an iterative decoding optimization engine (190). An adaptive convergence monitor (180) comprising an error metric computation unit (182), convergence decision logic (184) with a two-out-of-three voting rule, and an iteration count regulator (186) dynamically adjusts iteration counts based on real-time convergence assessment with configurable thresholds. A priority-based memory allocator (214) employs a weighted priority assignment algorithm responsive to channel severity. An early termination controller (196) terminates decoding upon syndrome satisfaction.
Disclaimer: Curated by HT Syndication.
