MUMBAI, India, Sept. 7 -- Intellectual Property India has published a patent application (202611083851 A) filed by Chandigarh University on July 08, 2026, for Parallel Multi-Debugger Port System.
Inventors include Ujjwal Pal; Harshit; Dr. Paurav Goel; and Dr. Rakesh Kumar.
The application for the patent was published on September 04, 2026, under issue no. 36/2026.
Abstract: The present invention relates to a hardware-software integrated Parallel Multi-Debugger Port System configured to enable simultaneous debugging of multiple embedded target devices through a centralized interface. The system comprises a multi-port hardware interface supporting multiple debugging protocols including JTAG, SWD, UART, SPI, and USB, a central controller for coordinating concurrent debugging sessions, and intelligent firmware for maintaining synchronization, signal integrity, and uninterrupted communication. A software dashboard provides centralized monitoring and management of active debugging sessions by displaying real-time logs, variable traces, performance statistics, and error notifications while enabling independent control of each target device. Optional artificial intelligence or machine learning capabilities facilitate automated error detection and performance analysis. The invention eliminates manual switching between target devices, reduces debugging time, enhances developer productivity, and is particularly suitable for Internet of Things (IoT), automotive, robotics, semiconductor testing, and other multi- controller embedded system applications.
Disclaimer: Curated by HT Syndication.
