MUMBAI, India, June 22 -- Intellectual Property India has published a patent application (202641069961 A) filed by Cvr College Of Engineering on June 04, 2026, for On-Chip Hardware Trojan Detection Using Power Signature Learning.
Inventor includes S. Ravikanth.
The application for the patent was published on June 12, 2026, under issue no. 24/2026.
Abstract: An intelligent on-chip hardware Trojan 'detection' using power signature learning technology has been developed by the inventors to facilitate the secure design of modern VLSI systems and/or SoC architectures. The inventive device employs distributed on-chip power sensor technology to provide real-time monitoring of numerous functional blocks, allowing for the creation of power signature vectors representing the average power signature behaviour for that block. Additionally, the invention uses machine learning methods to determine baseline power behaviour during a trusted operational condition (TOC) of IC. An adaptive solution is created, allowing for the effects of process, voltage, temperature, and aging to be adequately accounted for to promote long-term compatibility and effectiveness. In the event that a suspicious condition arises, the on-chip systems will be remedied automatically by isolating a block, throttling performance or generating secure alerts.
Disclaimer: Curated by HT Syndication.
