MUMBAI, India, Oct. 26 -- Intellectual Property India has published a patent application (202617090269 A) filed by International Business Machines Corporation on July 24, 2026, for Multi-Tier Analog In-Memory Computing Device.
Inventors include Vasilopoulos, Athanasios; Singh, Abhairaj; Boybat Kara, Irem; Le Gallo-Bourdeau, Manuel; and Sebastian, Abu.
The application for the patent was published on October 23, 2026, under issue no. 43/2026.
Abstract: An analog in-memory computing (AIMC) system includes a plurality of tiles. A plurality of vertically stacked tiers are present on each tile. Each tier comprises a crossbar of resistive memory devices, configured to encode a matrix of weights. A digital to analog convert (DAC) is shared by the plurality of tiles. The DAC is configured to encode an input vector to voltage pulses applied on the crossbar. An analog to digital converter (ADC) is shared by the plurality of tiles, and includes a register of counters. The ADC is configured to measure an induced current on each column of the crossbar and digitize the induced current into a digital value. A programmable logic controller is configured to: control the ADC to retain integration values between integrations performed for each tier. An accumulation of partial integration results is performed in-situ of the tile.
Disclaimer: Curated by HT Syndication.
