MUMBAI, India, Sept. 22 -- Intellectual Property India has published a patent application (202647108773 A) filed by Tenstorrent Usa, Inc. on September 10, 2026, for Memory Status Based Traffic Routing On Heterogeneous Memory Subsystem.

Inventors include Shu, Wei; and Ishii, Yasuo.

The application for the patent was published on September 18, 2026, under issue no. 38/2026.

Abstract: Systems and methods related to memory status based traffic routing on heterogeneous memory subsystem are disclosed herein. A high bandwidth memory (HBM) may act as a cache for a double data rate (DDR) memory. HBM may have a higher access latency than DDR memory in some situations, such as low usage. Access latency for a read request via a DDR memory may increase substantially when the usage exceeds one or more thresholds. Accordingly, the routing of the read requests may be tailored to reduce access latency. For example, the usage of the DDR memory may be monitored. When the usage is below a percentage threshold, the access request may be routed to DDR memory rather than HBM. When the usage is above a percentage threshold, the access request may be routed to HBM or DDR. Routing read requests in this manner may minimize overall latency of read access requests.

Disclaimer: Curated by HT Syndication.