MUMBAI, India, Aug. 31 -- Intellectual Property India has published a patent application (202644016850 A) filed by Samsung Electronics Co. , Ltd. on February 16, 2026, for Memory Controller And Method For Managing Memory Access Requests From A Plurality Of Masters.
Inventors include Ballary, Sampathkumar M; Patgar, Ramesh Ganesh; Lohiya, Aruna Shamsunder; S, Vandana; and Srinivasan, Karthik.
The application for the patent was published on August 28, 2026, under issue no. 35/2026.
Abstract: The present disclosure provides a memory controller for managing memory access requests from a plurality of masters. The memory controller may include a master decoding engine configured to decode memory access response traffic for the plurality of masters, a master latency storage configured to store a plurality of latency parameters, per-master first-in-first-out (FIFO) buffers configured to store a plurality of responses pending transmission to a respective master, a timer module configured to determine elapsed time and to accumulate latency error statistics, an adaptive weight generation engine configured to receive the latency error statistics and to generate one or more arbitration weights for each of the plurality of masters based on the latency error statistics, and a weighted arbiter configured to arbitrate between the plurality of responses ready for transmission from the per-master FIFO buffers.
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