MUMBAI, India, Oct. 5 -- Intellectual Property India has published a patent application (202647115015 A) filed by Google LLC on September 25, 2026, for Memory And Compute 3dic Integration Without Through Silicon Via.
Inventors include Weng, Li-Sheng; Kim, Chin Kwan; Park, Hee Jun; Hwang, Inho; Yoon, Hongil; and Shah, Milind.
The application for the patent was published on October 02, 2026, under issue no. 40/2026.
Abstract: Methods, systems, and methods of manufacture are described for integrating memory and compute die in a stacked configuration in an integrated circuit package without through silicon via. A packaging apparatus that includes a first semiconductor die comprising multiple memory cells and a second semiconductor die comprising compute logic representing a Processing-in-Memory (PiM) architecture. The PiM architecture is configured to process data stored at the memory cells. The first semiconductor die and the second semiconductor die are: i) arranged in a stacked configuration and ii) coupled to exchange signal communications that allow for processing, at the second semiconductor die, data routed from a memory cell of the first semiconductor die.
Disclaimer: Curated by HT Syndication.
