MUMBAI, India, Sept. 22 -- Intellectual Property India has published a patent application (202647103415 A) filed by Google LLC on August 27, 2026, for Memory Access Scheduling For Parallel Computations Using A Processing-In-Memory Architecture.
Inventors include Park, Hee, Jun; Hwang, Inho; and Yoon, Hongil.
The application for the patent was published on September 18, 2026, under issue no. 38/2026.
Abstract: Methods, systems, and apparatus, including computational instructions/programs encoded on non-transitory computer-readable media, are disclosed for command and memory access scheduling at an integrated circuit. A system determines a performance target for executing an ML workload and based on a first priority, schedules commands for compute operations for executing the workload at a processor-in-memory ("PiM") block of a memory device. For concurrent memory transactions of both PiM commands for the compute and memory access requests, the system determines a prospective violation of the performance target for the workload and addresses the prospective violation by adjusting the first priority to exceed a second priority assigned to the memory requests. The system satisfies both the performance targets for executing the ML workload at the PiM block and processing memory requests by adjusting the first priority to exceed the second priority and adjusting an operating frequency of the memory device and PiM block.
Disclaimer: Curated by HT Syndication.
