MUMBAI, India, June 30 -- Intellectual Property India has published a patent application (202641075539 A) filed by Vardhaman College Of Engineering on June 18, 2026, for Machine Learning Based Vlsi Architecture For Real-Time Detection Of Abnormal Heartbeat Patterns.
Inventors include Dr. I. Babu; Dr. B. Srikanth; Mr. Nagarjuna Malladhi; Mr. Tareeq Zaid; Mrs. A. Geethanjali; and Mr. R. Phani Vidyadhar.
The application for the patent was published on June 26, 2026, under issue no. 26/2026.
Abstract: Machine learning based VLSI architecture for real-time detection of abnormal heartbeat patterns is the proposed invention. The advanced machine-learning-based VLSI architecture introduces an innovative real-time heartbeat monitoring framework for comprehensive cardiac arrhythmia detection that integrates computational validation protocols with adaptive pattern recognition mechanisms, facilitating real-time electrocardiogram analysis, dynamic signal optimization, and robust abnormality confirmation while maintaining seamless medical integration and diagnostic accuracy for consistent cardiac monitoring applications. The comprehensive cardiac monitoring framework employs adaptive machine learning algorithms and intuitive signal processing protocols, utilizing embedded neural network processing arrays and energy-efficient computation systems to ensure timely arrhythmia identification, enhanced cardiac understanding, and optimal diagnostic reliability while maintaining continuous heartbeat monitoring capabilities.
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