MUMBAI, India, Sept. 14 -- Intellectual Property India has published a patent application (202641107224 A) filed by Mlr Institute Of Technology; and Marri Laxman Reddy Institute Of Technology And Management on September 07, 2026, for Low-Power Bcd To 14-Segment Alphanumeric Display Decoder Using Modified Gate Diffusion Input (mgdi) Technique.
Inventors include Mr. Sudhakar Ajmera; Ms. L. Leelarani; Ms. K. Akhita; and Ms. K. Pavani.
The application for the patent was published on September 11, 2026, under issue no. 37/2026.
Abstract: The 14-segment display represents a significant advancement in digital display technology, as it enables the representation of decimal digits along with selected alphanumeric characters and symbols, thereby providing a versatile solution for visual information display. This work presents the design and implementation of a 14- segment display decoder using the Modified Gate Diffusion Input (MGDI) technique. Compared to conventional CMOS-based designs, the MGDI technique offers improved switching speed, reduced power consumption, and optimized silicon area. By employing MGDI-based logic structures, the proposed decoder achieves low power dissipation while maintaining high-speed performance, making it suitable for energy-efficient and high-performance applications such as automotive systems, healthcare electronics, and industrial control units. All stages of the design process, including schematic design, simulation, and physical layout, were carried out using Cadence Virtuoso at the 180 nm CMOS technology node. Simulation results confirm that the MGDI-based 14-segment decoder exhibits lower power consumption, reduced circuit area, and faster operation compared to traditional CMOS implementations, thereby demonstrating an effective approach for compact, high-speed, and energy-efficient visual display systems.
Disclaimer: Curated by HT Syndication.
