MUMBAI, India, June 22 -- Intellectual Property India has published a patent application (202631043225 A) filed by Indian Institute Of Technology Bhubaneswar on April 04, 2026, for Low-Power And Low-Noise Dynamic Comparator With Crosscoupled Load.
Inventors include Vijay Shankar Pasupureddi; Subrahmanyam Boyapati; and Maram Srinivasa Rao.
The application for the patent was published on June 12, 2026, under issue no. 24/2026.
Abstract: ABSTRACT TITLE: LOW-POWER AND LOW-NOISE DYNAMIC COMPARATOR WITH CROSS-COUPLED LOAD The present invention provides a double- tail strongarm latch comparator for using in energy efficient analog-to-digital converters. The proposed dynamic comparator can be implemented by deploying a cross- coupled load to the differential input pair which provides high preamplifier gain. The power dissipation will increase due to the cross couple connection in the preamplifier. To mitigate the power issue, two additional NMOS transistors are connected in series with the tail transistor. The additional transistors are driven by the complemented outputs of the latch stage, which results an incomplete discharge of the preamplifier output nodes and power off the preamplifier stage once the output latch is triggered. Fig. 1
Disclaimer: Curated by HT Syndication.
