MUMBAI, India, Aug. 31 -- Intellectual Property India has published a patent application (202641101271 A) filed by Dr. Shobana D; Dr. Reghunath K; Mr. N. Kannan; Dr. Balaji P; Mr. Ganesan S; Dr. S. Sivaramakrishnan; Dr. Prathipa R; and Ms. Meenakshi S on August 21, 2026, for Integrated Embedded Vlsi Platform For Ai-Assisted Image Processing Analytics Over Next-Generation 5g Communication Networks..
Inventors include Dr. Shobana D; Dr. Reghunath K; Mr. N. Kannan; Dr. Balaji P; Mr. Ganesan S; Dr. S. Sivaramakrishnan; Dr. Prathipa R; and Ms. Meenakshi S.
The application for the patent was published on August 28, 2026, under issue no. 35/2026.
Abstract: The present invention relates to an integrated embedded very large scale integration platform comprising means for enabling artificial intelligence assisted image processing analytics over next generation fifth generation communication networks. The invention finds application in scenarios requiring high-performance real-time visual data interpretation which cannot be satisfied by conventional approaches, due to insufficient combinations of speed, energy-efficiency and network responsiveness. Applications such as intelligent surveillance, industrial inspection, autonomous driving, medical diagnostics, and smart infrastructure monitoring routinely generate large quantities of visual data that must be analyzed in real-time and often distributed to downstream systems for additional processing or decision-making. Known solutions employ either general- purpose processors or specialized hardware for image processing acceleration, but are limited in their ability to deliver the required performance while maintaining acceptable power consumption, reducing latencies in distributed settings, or integrating tightly with high-bandwidth wireless links. The invention provides an embedded very large scale integration platform comprising a heterogeneous system-on-chip or multi-chip module featuring tightly integrated image processing circuits, artificial intelligence accelerators, and fifth generation radio frequency circuits. A major aspect of the invention lies in the organization of the embedded platform in the form of a system-on-chip or multi-chip module using cutting-edge complementary metal oxide semiconductor technologies, wherein image acquisition circuitry is combined with specialized image signal processing circuits, artificial intelligence processing elements, video memory, and fifth generation communication circuits within a single monolithic or multi- chip structure. The embedded platform comprises image acquisition interface circuitry, which is configured to receive image or video data from various sources such as complementary metal oxide semiconductor, charge coupled device, or other types of image sensors. The received image or video data undergoes pre-processing in programmable image processing circuits, to produce pre-processed pixel data. The pre-processed pixel data is subsequently passed to a plurality of artificial intelligence acceleration cores, which are configured to perform artificial intelligence processing operations such as inference using deep neural networks. The artificial intelligence accelerators comprise heterogeneous data path accelerators, such as systolic arrays, sparse operations accelerators, and other units required for performing convolutional and self-attention type operations common in modern image analysis algorithms. The embedded platform comprises video memory, which is used to cache pixel data and data produced by the artificial intelligence accelerators during the image processing pipeline. The video memory is comprised of high-bandwidth static random access memory banks, and is integrated within the embedded platform. By virtue of being integrated on-chip, the video memory provides significant reductions in memory access latencies and overheads as compared to conventional off-chip memory solutions.
Disclaimer: Curated by HT Syndication.
