MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202647105735 A) filed by Google LLC on September 02, 2026, for Idle State Management Of An Soc And Processing-In-Memory Architecture In A Heterogeneous Computing System.
Inventors include Park, Hee Jun; Hwang, Inho; and Yoon, Hongil.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: Methods, systems, and apparatus, including computational instructions/programs encoded on non-transitory computer-readable media, are disclosed for decreasing state transition latency by determining a target type of idle mode. A system determines a first sequence of mode transitions. Each mode transition in the first sequence is a transition from an execution mode of to an idle mode of the memory device. The system determines, before occurrence of each mode transition in the first sequence, a type of idle mode from multiple among multiple mode types based on a dynamically updated energy model. The system iteratively generates and pre-programs a first set of control signals based on the corresponding type of idle mode for each mode transition in the first sequence, and based on the first set of control signals, the system iteratively triggers occurrence of each mode transition in the first sequence. Each triggered occurrence causes the memory device to transition to a corresponding type of idle mode.
Disclaimer: Curated by HT Syndication.
