MUMBAI, India, June 26 -- Intellectual Property India has published a patent application (202617068762 A) filed by Advanced Micro Devices, Inc. on June 01, 2026, for Hybrid Bonded Inverted Memory-Logic Stack.
Inventor includes Loh, Gabriel.
The application for the patent was published on June 19, 2026, under issue no. 25/2026.
Abstract: Memory layers and a digital device layer are configured into a three-dimensional integrated circuit (IC) die stack. The digital device layer (304) has a first surface (side) located closest to a cooling solution (308) and the memory layers are located on a second surface (side) of the digital device layer opposite to the first surface (side) thereof. The cooling solution is adapted to receive and dissipate heat from the digital device layer (304) and the memory layers (302). Through-silicon vias (TSV) (314) running through the memory layers and to the digital device layer are used to interconnect the signal, control and power supply voltages to circuits in these layers. Some of the TSVs are used to couple to external connections of a memory stack device. The digital device layer may be a complex electronic device layer such as a microprocessor or microcontroller for improved high speed signal transfers.
Disclaimer: Curated by HT Syndication.
