MUMBAI, India, Aug. 12 -- Intellectual Property India has published a patent application (202541072203 A) filed by Indian Institute Of Science on July 29, 2025, for High-Bandwidth Non-Volatile Memory.
Inventors include Goswami, Sreetosh; and Bhat, Navakanta.
The application for the patent was published on August 07, 2026, under issue no. 32/2026.
Abstract: ABSTRACT SYSTEM-ON-CHIP WITH INTEGRATED NON-VOLATILE MEMORY A system-on-chip (SoC) (100) is disclosed. The SoC comprises a substrate 5 (102), a processing core (104) disposed on the substrate (102), and a non- volatile memory (NVM) (106) disposed on the substrate (102). The NVM (106) comprises a first conductive layer, a molecular material layer (210) disposed on the first conductive layer (208), and a second conductive layer (212) disposed on the molecular material layer (210). A portion of the molecular material layer 10 interposed between the first conductive layer (208) and the second conductive layer (212) defines a memristor. An interconnect electrically couples the processing core (104) to the NVM (106) and defines a conductive path between the processing core (104) and the NVM (106). The processing core (104) and the NVM (106) are integrated within the SoC (100). 15 FIG. 1A
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