MUMBAI, India, Nov. 2 -- Intellectual Property India has published a patent application (202647126387 A) filed by Qualcomm Incorporated on October 23, 2026, for High-Bandwidth 3d Stacked Memory With A Base Die Enabling Compute Logic Without Memory Power Grid Restrictions.
Inventors include Badaroglu, Mustafa; Wang, Zhongze; Kang, Woo Tag; and Chidambaram, Periannan.
The application for the patent was published on October 30, 2026, under issue no. 44/2026.
Abstract: A three-dimensional (3D) stacked memory package is described. The 3D stacked memory package includes a base die. The 3D stacked memory package also includes a plurality of memory dies stacked on the base die. The 3D stacked memory package further includes a package substrate supporting the base die. The 3D stacked memory package also includes a plurality of signal through substrate vias (TSVs) extending between the plurality of memory dies and landing on the base die. The 3D stacked memory package further includes a set of wire-bonds coupled between the package substrate and the plurality of memory dies to power the plurality of memory dies.
Disclaimer: Curated by HT Syndication.
