MUMBAI, India, Aug. 31 -- Intellectual Property India has published a patent application (202611083709 A) filed by Synergy Quantum India Private Limited on July 08, 2026, for Fpga-Based Post-Quantum Cryptographic Accelerator With Parallel Ntt Engine.
Inventors include Rajput, Nikhil Kumar; Rathi, Vipin Kumar; Oberai, Jaswinder Singh; and Prasad, Rahul.
The application for the patent was published on August 28, 2026, under issue no. 35/2026.
Abstract: An FPGA-based cryptographic acceleration apparatus includes a field-programmable gate array fabric (106) including a parallel execution domain (220). The parallel execution domain (220) includes a key encapsulation mechanism controller (202) configured to sequence post-quantum key encapsulation operations, a number theoretic transform engine (204) configured to perform polynomial arithmetic operations for lattice-based cryptography, and an authenticated encryption engine (206) configured to perform symmetric authenticated encryption operations. The number theoretic transform engine (204) and the authenticated encryption engine (206) are mapped to substantially independent hardware partitions of the field-programmable gate array fabric (106), enabling concurrent execution of the number theoretic transform engine (204) and the authenticated encryption engine (206) such that a combined primitive latency is substantially determined by a maximum of individual primitive latencies of the number theoretic transform engine (204) and the authenticated encryption engine (206).
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