MUMBAI, India, Oct. 5 -- Intellectual Property India has published a patent application (202647114326 A) filed by Applied Materials, Inc. on September 24, 2026, for Finishing On Packaging Substrate With Ultra High-Density Interconnects.
Inventors include Verhaverbeke, Steven; Chen, Han-Wen; Park, Giback; Zheng, Kai; Leschkies, Kurtis Siegfried; Houk, Roman; Iyer, Subramanian Srikanteswara; and Harish, Vineeth.
The application for the patent was published on October 02, 2026, under issue no. 40/2026.
Abstract: A packaging substrate is provided. The packaging substrate includes a core and first organic buildup layers on a first side of the core. The first organic buildup layers include an organic dielectric material and at least one of first metallic traces, first metallic vias, or first metallic pads. The packaging substrate includes second organic buildup layers on a second side of the core that is opposite the first side. The second organic buildup layers include the organic dielectric material and at least one of second metallic traces, second metallic vias, or second metallic pads. The packaging substrate includes first inorganic buildup layers disposed on the first organic buildup layers. The first inorganic buildup layers include an inorganic dielectric material and at least one of third metallic traces, third metallic vias, or third metallic pads.
Disclaimer: Curated by HT Syndication.
