MUMBAI, India, June 30 -- Intellectual Property India has published a patent application (202641073915 A) filed by Mohan Babu University on June 15, 2026, for Energy Efficient Approximate Adder Architecture For Breast Cancer Image Processing Application.
Inventors include Dr. Avireni Srinivasulu; Ms. Attanti Nandhini; Ms. Reddipalli Likitha; and Mr. Baisani Hemanth Kumar.
The application for the patent was published on June 26, 2026, under issue no. 26/2026.
Abstract: The present invention proposes an energy-efficient approximate full adder architecture designed for error-tolerant applications such as biomedical image processing. The proposed 8-transistor (8T) design utilizes pass transistor logic and CNTFET technology to achieve reduced power consumption, low delay, and an optimized power-delay product (PDP). By simplifying carry propagation and logic operations, the circuit minimizes hardware complexity while maintaining acceptable computational accuracy. The proposed adder is evaluated using standard performance metrics and demonstrates significant improvements over existing designs. Its applicability is validated through breast cancer image processing, where image quality metrics such as PSNR and SSIM confirm satisfactory output performance. The invention provides an effective trade-off between energy efficiency and accuracy, making it suitable for low-power, real-time biomedical and image processing applications.
Disclaimer: Curated by HT Syndication.
