MUMBAI, India, Oct. 26 -- Intellectual Property India has published a patent application (202641123415 A) filed by Srm Institute Of Science And Technology, Ramapuram Campus; and Easwari Engineering College on October 15, 2026, for Early Stage Hardware Anomaly Prescreening For Efficient Validation.
Inventors include Anuvarshini N; Akshaya M; Darun A; Sharmishree C; Dr. P. Sharmila; and Dr. R. Thangam.
The application for the patent was published on October 23, 2026, under issue no. 43/2026.
Abstract: ABSTRACT: Testing a significant number of chips in detail may be extremely time and resource consuming. Moreover, some of the devices abnormal behavior may have a very low probability of occurring or even not be manifested at all, which makes it challenging to determine which of the tested devices should be subjected to more detailed control. The project presented in this paper aims to introduce an Intelligent Hardware Anomaly Pre-Screening and Validation Prioritization System that will serve as the first-level testing and validation system. The idea is to use an FPGA-based testing machine, which will be subjected to specific stress tests, while the currents, voltages, temperatures, and other parameters will be analyzed using a Raspberry Pi microcomputer. The obtained data will be used to determine normal behavior patterns and deviations from them, which will allow us to calculate the Screening Risk Score and prioritize the chips for further analysis. The paper will show that the proposed system will be capable of distinguishing between different normal behaviors and anomalous activity, which would help allocate more resources to the suspicious devices while minimizing false alarms.
Disclaimer: Curated by HT Syndication.
