MUMBAI, India, Sept. 22 -- Intellectual Property India has published a patent application (202641110080 A) filed by Vellore Institute Of Technology on September 14, 2026, for Device And Method For Generating Traversal Addresses For A Cumulative-Sum Array.
Inventors include Goutam Majumder; Aditya Vikram Sinha; and Atharva Khulbe.
The application for the patent was published on September 18, 2026, under issue no. 38/2026.
Abstract: ABSTRACT DEVICE AND METHOD FOR GENERATING TRAVERSAL ADDRESSES FOR A CUMULATIVE-SUM ARRAY A device for generating traversal addresses for a cumulative-sum array includes a streaming interconnect interface (101) configured to receive an index. An index-state circuit (205) is configured to form a partial-index representation from successive portions of the index as the successive portions are received via the streaming interconnect interface (101). An address- generation circuit is configured to derive, from the partial-index representation, one or more traversal addresses of the cumulative-sum array. An output interconnect interface (701) is configured to output at least one traversal address before a complete representation of the index has been received by the streaming interconnect interface (101). The device may further comprise a masking module (401), a shifting stage (501), and a prefix-OR address concatenator (601) for generating an address family comprising a plurality of traversal addresses per received portion. (Fig. 1)
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