MUMBAI, India, Oct. 5 -- Intellectual Property India has published a patent application (202641115481 A) filed by Vallurupalli Nageswara Rao Vignana Jyothi on September 26, 2026, for Design Of A High-Speed Energy-Efficient Lfsr Counter Using Tigfet Technology And State Detection.
Inventor includes Ms. S. Nagaleela.
The application for the patent was published on October 02, 2026, under issue no. 40/2026.
Abstract: ABSTRACT [0021] Counters are an essential part of digital systems employed to produce timing signals, synchronize the operation, and regulate data transfer. They are also critical in high-speed communications systems for correct data transmission and reception. In addition to LFSRs, counters also facilitate secure pseudo-random number generation for cryptographic purposes. Improved designs implemented with TIGFET technology upgrade them towards quicker and lower power consumption for use in today's low-power, high-speed systems. LFSR counter counters have some disadvantages like creating non-sequential outputs and are predictable if feedback logic is implemented, which restrains their usage in some disciplines. They can also not create the all-zero state, minimizing the number of states available. These problems can be reduced with the help of State Detection circuit and improved speed and efficiency and improvement in the feedback logic to augment randomness and trustworthiness. [0022] Traditional counters and LFSRs are conventionally implemented using CMOS technology; however, with a trend towards scaled-down technology, the size of CMOS transistors decreases, resulting in increased short-channel effects, increased leakage currents, and increased power consumption. Moreover, CMOS-based high-speed counters have the disadvantages of delays and power inefficiency that render them less suitable for ultra-fast communication and cryptographic systems. TIGFET-based circuits, however, eliminate the above-stated problems with improved switching speed, lower static and dynamic power dissipation, and improved low-voltage compatibility. [0023] In this project we designed a dynamic bridging sense amplifier circuit to improve flip-flop performance with a dynamic path used only when needed, rejecting unnecessary power consumption and with static operation guaranteed. It links specific components of the circuit only when the inputs are being altered, thus making the circuit more efficient and consume less power. The design saves power consumption, to reduce transistors count, and speeds up suited for low power, high speed flip-flop circuits. Verified by SPICE-level simulations, it demonstrates significant improvement over conventional designs with the guarantee that TIGFET technology is a strong candidate for future VLSI systems with high speed, low power, and small area.
Disclaimer: Curated by HT Syndication.
