MUMBAI, India, Aug. 17 -- Intellectual Property India has published a patent application (202641093024 A) filed by Chennai Institute Of Technology on July 31, 2026, for Defect-Engineered Co-Substituted Tin Sulfide Material And A Co-Precipitation Method Thereof For Multifunctional Optical, Electrical, And Energy Storage Applications.
Inventors include Dr. P. Elaiyaraja; Dr. N. Senthilkumar; and Dr. E. Nandhakumar.
The application for the patent was published on August 14, 2026, under issue no. 33/2026.
Abstract: The titled invention discloses a defect-engineered cobalt-substituted tin sulfide (Co- SnS) semiconductor material and a controlled co-precipitation method for preparing the same. The invention provides a low-temperature synthesis process in which cobalt 10 ions are homogeneously incorporated into an orthorhombic tin sulfide lattice to deliberately generate and stabilize lattice defects without forming secondary phases. The stabilized defect landscape enhances photoluminescence emission, electrical charge transport, and reversible energy-storage characteristics by promoting defectassisted radiative recombination, bulk-dominated hopping conduction, and reversible 15 charge trapping and detrapping. The controlled co-precipitation process enables homogeneous dopant incorporation, compositional control of defect density, lattice strain, and crystallite size while maintaining phase purity and structural stability. The synthesized multifunctional semiconductor material is suitable for optoelectronic devices, photodetectors, electrical and impedance-based sensors, capacitive energy- 20 storage devices, and other advanced semiconductor applications.
Disclaimer: Curated by HT Syndication.
