MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202621050321 A) filed by Optimized Electrotech Private Limited on April 20, 2026, for Debug Controller Circuit.
Inventors include Shah, Dharin; and Nayak S, Sudha.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: TITLE OF INVENTION: DEBUG CONTROLLER CIRCUIT A system (100) for debugging a peripheral is disclosed. The system (100) includes an ethernet port (140), an external debug port (150), and a routing unit (120). The ethernet port (140) communicates with a plurality of peripherals (P1-Pn) mounted on a PCB (110). The external debug port (150) is configured to communicate with a faulty peripheral. The routing unit (120) is communicatively coupled with the plurality of peripherals (P1-Pn) and a SoC (130). The routing unit (120) includes a decoder unit (121) and a plurality of selection and communication units. The decoder unit (121) includes an enable input pin, select pins, and output pins. Each selection unit (123) comprises at least one MUX and one DEMUX, coupled to respective decoder outputs. Communication units (122) include a transmitter and a receiver for data exchange with the SoC (130). During normal operation, communication paths are maintained, while faulty peripherals are rerouted via the external debug port (150) without disruption. Fig. 1
Disclaimer: Curated by HT Syndication.
