MUMBAI, India, Oct. 5 -- Intellectual Property India has published a patent application (202641115407 A) filed by Vellore Institute Of Technology on September 26, 2026, for Compositor Authority And Generation Enforcement For Frame-Synchronized Surface-Identity- Bound Input Dispatch In Computer-Using Agents.
Inventors include Balamurugan R; and Shuhul Razdan.
The application for the patent was published on October 02, 2026, under issue no. 40/2026.
Abstract: ABSTRACT COMPOSITOR AUTHORITY AND GENERATION ENFORCEMENT FOR FRAME-SYNCHRONIZED SURFACE-IDENTITY-BOUND INPUT DISPATCH IN COMPUTER-USING AGENTS A method for input dispatch in a computer-using agent system wherein the agent observes pixels and injects operating- system user-interface events at pixel coordinates. The method comprises receiving, at a privileged composition plane, surface records comprising surface identifiers, geometry, z-order, opacity, owner identifiers, origin identifiers, and actionable regions with permitted event classes. The method comprises validating the surface records, allocating a strictly increasing generation identifier, resolving visibility and topmost ownership by excluding zero-opacity surfaces and applying deterministic tie-breaking, populating authority cells, and publishing a visible frame and authority representation as an immutable pair. The method comprises receiving a fixed event proposal at a protected enforcement plane, acquiring a protected current-authority handle, evaluating an ordered conjunction of predicates comprising freshness, bounds, visibility, cell-generation, surface-identity, owner-identity, origin-identity, actionable-region, and capability predicates, and invoking an operating-system input sink exactly once responsive to all predicates passing or producing a typed refusal with zero actuation responsive to any predicate failing.
Disclaimer: Curated by HT Syndication.
