MUMBAI, India, Aug. 31 -- Intellectual Property India has published a patent application (202641101778 A) filed by Vellore Institute Of Technology on August 23, 2026, for Capability-Aware Federated Learning Framework For Heterogeneous Microcontroller Clusters.
Inventors include Pushpa Gothwal; Yash Kumar Sinha; Lakshya Gupta; Parvati Nair; and Venkata Hrishi Samay Jetty.
The application for the patent was published on August 28, 2026, under issue no. 35/2026.
Abstract: ABSTRACT A distributed machine-learning system for heterogeneous microcontroller unit (MCU) nodes is disclosed. An aggregator (101) profiles each MCU node using a hardware capability vector and assigns the node to one of a plurality of capability tiers (103– 105). A Tier-Adaptive Model Partitioning (TAMP) module (106) assigns a depth-sliced sub-model with an auxiliary classification head according to the assigned tier. A CW-SAA protocol (107) employs a soft round window and staleness-aware weighting to aggregate model updates without requiring all nodes to complete an iteration. A GISDE gradient compression module (108) performs importance sparsification with error feedback followed by delta encoding, thereby reducing communication overhead. The aggregator (101) maintains and updates a global model (109) using shared model blocks received from the heterogeneous MCU nodes. The system thereby enables efficient distributed learning across MCU nodes having different computational and memory capabilities while reducing synchronization delays and communication bandwidth requirements.
Disclaimer: Curated by HT Syndication.
