MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202641111270 A) filed by Vellore Institute Of Technology on September 14, 2026, for Asynchronous Neuromorphic Processing Apparatus Employing A Clamped Selective-Transition Micro-Operation For Stability-Constrained Event-Gated Execution.
Inventors include Jagadeesan S; Kishore E; Vishva S A; Dhanush T; Pmr Pramadha; and Sharu Sree S.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: ABSTRACT ASYNCHRONOUS NEUROMORPHIC PROCESSING APPARATUS EMPLOYING A CLAMPED SELECTIVE-TRANSITION MICRO- OPERATION FOR STABILITY-CONSTRAINED EVENT-GATED EXECUTION The present disclosure provides a neuromorphic inference system (100) comprising an asynchronous neurocore array (108) with a leaky-integrate-and-fire neuron array (114). A fused clamped selective-transition execution unit (210) within each CST-core (110) includes a pre-gate magnitude estimator (212), a coefficient selector (214), a zero-order-hold discretizer (216), a stability-margin clamp (218) constraining discretized coefficients to a programmable margin prior to writing a hidden-state register file (232), a single-commit integer MAC unit (220), and a threshold comparator (234) generating output spikes.
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