MUMBAI, India, July 13 -- Intellectual Property India has published a patent application (202541000659 A) filed by Hindusthan Institute Of Technology on January 03, 2025, for An In-Depth Examination Of Design Approches For Chiplet Based Architectures.
Inventors include Dr. C. Natarajan; Dr. B. Paulchamy; Dr. A. S. Narmadha; A. Somanatha Shetty; K. Kowsalya; Dr. S. Kokilavani; and A. S. Krishna.
The application for the patent was published on July 10, 2026, under issue no. 28/2026.
Abstract: Chiplet-based architectures provide many advantages compared to traditional monolithic System-on-Chips (SoCs). These advantages encompass enhanced performance, reduced power consumption, and amplified design flexibility. One way in which chiplet technology can help extend Moore’s Law is by allowing for the creation of more complex and powerful SoCs without having to fit all of the necessary components onto a single, monolithic chip. Chiplet-based design, which breaks a system into multiple smaller dice (or “chiplets”) and reassembles them into a new system chip through advanced packaging, has received extensive attention in the post Moore's law era due to its advantages in terms of cost, performance, and agility. However, significant challenges arise in this implementation approach, including the mapping of functional components onto chiplets, co-optimization of package and architecture, handling the increased latency of communication across functions in different dies. Despite various design approaches that attempt to address these challenges, surveying these approaches one-after-another is not the most helpful way to offer a comparative viewpoint. The chiplet design method is a progression of the company's modular design. This paper concludes with general architectural design approaches which help in building the advanced chiplet based designs.
Disclaimer: Curated by HT Syndication.
