MUMBAI, India, Oct. 5 -- Intellectual Property India has published a patent application (202641114479 A) filed by Vallurupalli Nageswara Rao Vignana Jyothi Institute Of Engineering And Technology on September 24, 2026, for An Fpga-Based Real-Time Primary Synchronization System For 5g New Radio Using Parallel Pss Detection And Correlation.
Inventor includes Dr. Aytha Ramesh Kumar.
The application for the patent was published on October 02, 2026, under issue no. 40/2026.
Abstract: ABSTRACT [0028] The rapid evolution of mobile communication systems has brought about the advent of 5G New Radio (NR), which introduces advanced features to meet the demands for higher data rates, reduced latency, and increased connectivity. One of the critical aspects of 5G NR is the synchronization process, which ensures that communication devices are properly aligned in time and frequency to facilitate seamless data exchange. This project explores the FPGA-based implementation of the primary synchronization process in 5G New Radio (NR) systems. The primary synchronization signal (PSS) is crucial for establishing and maintaining synchronization between base stations(gNB) and user devices(UE), ensuring reliable communication. This approach leverages the parallel processing power of Field Programmable Gate Arrays (FPGAs) to enhance the speed and efficiency of the synchronization process. This project is designed and implemented a system that performs real-time detection and correlation of the PSS, demonstrating significant improvements in processing speed and accuracy compared to traditional methods. The FPGA-based implementation enables low-latency synchronization, supporting the high-performance requirements of 5G networks. The 5G NR primary synchronization is designed with Verilog HDL and implemented in FPGA.
Disclaimer: Curated by HT Syndication.
