MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202611063537 A) filed by Noida Institute Of Engineering & Technology on May 20, 2026, for An Automated Fault Detection Circuit For Communication Hardware.
Inventors include Dheeraj Tripathi; and Nitu Rao.
The application for the patent was published on July 17, 2026, under issue no. 29/2026.
Abstract: An automated fault detection circuit for communication hardware is disclosed. The circuit includes sensing inputs coupled to monitored hardware nodes, a signal conditioning network, a diagnostic conversion unit, a programmable reference generator, correlation logic, event memory, and an output interface. Electrical and operational indicators from power, clock, signal path, interface, and environmental points are evaluated using configurable references. Correlated fault classes are recorded with contextual data and reported to a host controller, enabling rapid localization of hardware abnormalities while supporting continuous communication equipment supervision.
Disclaimer: Curated by HT Syndication.
