MUMBAI, India, Aug. 31 -- Intellectual Property India has published a patent application (202641099035 A) filed by Saveetha Engineering College on August 17, 2026, for Ai-Driven Thermal-Aware Floorplanning And Dynamic Power Management In Vlsi Circuits.
Inventor includes Durga Devi A.
The application for the patent was published on August 28, 2026, under issue no. 35/2026.
Abstract: The present invention concerns an artificial intelligence (AI) based thermal aware VLSI design methodology to enhance the reliability and performance of the chip by predicting thermal hotspots and dynamically controlling power distribution. As the feature size of the semiconductor continues to decrease, the higher density of transistors causes excessive heat generation leading to thermal hotspots, leakage power, timing degradation, and shortened chip lifetimes. To address these challenges, the proposed system combines AI- powered temperature forecasting, intelligent floorplanning, and power management strategies. The architecture has a continuous feedback loop that gathers real-time thermal data from the embedded sensors distributed throughout the chip. Data gathered is analyzed with machine learning algorithms to detect heat variations and to forecast potential hotspot areas prior to any hazardous situations. The system dynamically optimizes block placement, power gating, voltage scaling, and workload distribution based on prediction results, to minimize thermal stress. This proposed solution reduces hot spots, energy consumption and overall chip reliability. The invention is applicable to advanced ASIC, FPGA, processor and high performance computing applications where thermal management is a critical design consideration.
Disclaimer: Curated by HT Syndication.
