MUMBAI, India, Oct. 12 -- Intellectual Property India has published a patent application (202641119071 A) filed by Bannari Amman Institute Of Technology on October 05, 2026, for Ai-Driven Self-Healing Fpga Security Architecture Using Digital Twin And Dynamic Partial Reconfiguration.

Inventors include Meenakshi E; Rahul Sivesh S; Mohanapriyan P; Shriramachandran R S; and Mageshkumar B.

The application for the patent was published on October 09, 2026, under issue no. 41/2026.

Abstract: AI-DRIVEN SELF-HEALING FPGA SECURITY ARCHITECTURE USING DIGITAL TWIN AND DYNAMIC PARTIAL RECONFIGURATION An AI-driven self-healing FPGA security architecture that uses digital twin-assisted dynamic partial reconfiguration for autonomous cryptographic protection. The proposed system utilizes state-of-the-art artificial intelligence, real-time hardware monitoring, and adaptive FPGA reconfiguration techniques to ensure continuous protection against the evolving hardware security threats. The architecture includes a telemetry sensing monitoring layer (200) configured to collect and analyze voltage, temperature, timing, power consumption, and electromagnetic signature data from an FPGA platform. The system also includes an embedded AI-based prediction engine (201) that uses the collected data to detect anomalies, identify potential vulnerabilities and predict imminent attacks, before the system is compromised. The digital twin simulation engine (202) offers a real-time virtual representation of the FPGA environment for predictive security analysis, attack scenario analysis, and risk analysis without affecting the normal operation of the system. The dynamic partial reconfiguration controller (203) autonomously moves and reconfigures the critical cryptographic modules (204) into secure FPGA regions based on the security assessment. The system further comprises an autonomous self-healing recovery module (206) configured to isolate compromised logic blocks, regenerate cryptographic keys, restore trusted functionality and maintain uninterrupted secure operation (109). The invention provides proactive attack prevention, adaptive FPGA security, reduced downtime and autonomous recovery from voltage glitch attacks, side channel attacks, thermal attacks, hardware trojans and other emerging threats.

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