MUMBAI, India, Oct. 26 -- Intellectual Property India has published a patent application (202631119256 A) filed by Farhan Aftab Sk on October 05, 2026, for A System And Method For Zero-Knowledge Assessment And Cryptographic Time-Lock Proctoring.
Inventor includes Farhan Aftab Sk.
The application for the patent was published on October 23, 2026, under issue no. 43/2026.
Abstract: An edge-orchestrated system and method for secure, decentralized examination delivery that eliminates plaintext exposure and central execution bottlenecks. The system features an autonomous generation pipeline combining a Large Language Model (LLM) with a deterministic symbolic validation module to generate verified data payloads by filtering computational anomalies through Abstract Syntax Tree (AST) parsing. Verified payloads are encrypted and pre-staged across stateless edge caching nodes. Decryption on client hardware is locked until the asynchronous ingestion of a non-interactive threshold signature broadcast by a decentralized entropy beacon at an exact epoch timestamp, completely bypassing distributed ledger consensus mechanisms. The system further includes a zero knowledge blind grading assembly wherein client hardware natively generates salted cryptographic hashes of candidate inputs, allowing edge servers to evaluate responses against a master ledger without storing or processing plaintext answer keys.
Disclaimer: Curated by HT Syndication.
