MUMBAI, India, Sept. 22 -- Intellectual Property India has published a patent application (202641084115 A) filed by Manipal Academy Of Higher Education on July 08, 2026, for A System And Method For Posit Arithmetic-Based Fpga Hardware Accelerated Cancer Classification.
Inventors include Tyson Baptist D Cunha; Laxmisagar H. S; and Mohan Naik R.
The application for the patent was published on September 18, 2026, under issue no. 38/2026.
Abstract: The present invention discloses a hardware system and method for classifying numerical medical feature data on a Field-Programmable Gate Array using posit arithmetic-based pipelined multiply-accumulate architecture is disclosed. The system comprises a data pre-processing unit that converts real-valued patient feature vectors into a posit number format of reduced bit width, a dual-port block memory controller for concurrent retrieval of feature data and support vector machine weight values, a posit arithmetic multiplier unit performing parallel multiply operations with full intermediate precision retention without rounding, a six-stage pipelined adder tree accumulating partial products to produce a support vector machine decision score, a linear classifier module generating a binary classification output via a serial-in serial-out architecture, and an adaptive learning post-processor resolving boundary-case outputs through nearest-neighbour threshold determination and clustering-based outlier removal. The system achieves substantially higher classification accuracy, reduced data bandwidth, and lower on-chip power consumption. (FIG. 2)
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