MUMBAI, India, Nov. 2 -- Intellectual Property India has published a patent application (202641127288 A) filed by Dr Birudala Venkatesh Reddy; Sri Venkateswara College Of Engineering; Dr Shaik Rafi Kiran; Nanda Kumar Enjeti; B Sreenivas Reddy; P Vinod Kumar; Dr P Suresh; K Raju; Y Hari Krishna; and Dr V Gowtham on October 26, 2026, for A Switched Capacitor High Gain Dc-Dc Boost Converter With Reduced Voltage Stress Across Semiconductor Switches.
Inventors include Dr Birudala Venkatesh Reddy; Sri Venkateswara College Of Engineering; Dr Shaik Rafi Kiran; Nanda Kumar Enjeti; B Sreenivas Reddy; P Vinod Kumar; Dr P Suresh; K Raju; Y Hari Krishna; and Dr V Gowtham.
The application for the patent was published on October 30, 2026, under issue no. 44/2026.
Abstract: A switched capacitor high gain DC-DC boost converter architecture for achieving high voltage conversion steps with reduced voltage stresses across its semiconductor switching structures by combining an input energy storage inductor (102) with an active network comprising a first active switch (104), a second active switch (106), a first switched capacitor (110), a second switched capacitor (112) and an active steering diode (114). The capacitors are charged in parallel and discharged in series with the inductor under the control of a controller (108). The structure clamps the peak voltage stress across the switches (104, 106) to a fraction of the output voltage and allows the use of high efficiency, low voltage rated active elements.
Disclaimer: Curated by HT Syndication.
